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1 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation 14 drin1 61 dra1 59 drb1 13 t1in 58 t1out 16 t2in 54 t2out 17 t3in 47 t3out 24 t4in 51 t4out 22 drin2 42 dra2 44 drb2 15 drin3 63 dra3 65 drb3 23 sten 6 tten rca1 70 rcout 1 rcb1 71 rca2 37 rcout2 20 rcb2 38 r1in 66 r1out 80 r2in 68 r2out 78 r3in 35 r3out 19 r4in 39 r4out 21 rca3 76 rcout3 79 r ten 7 rcb3 77 29, 34, 43, 60, 64, 72 vdd 32 26 30 28 31 c1+ c1- c2+ c2- 27 vss vcc 0.1 f 0.1 f 0.1 f 0.1 f +5v 25, 33, 41, 62, 73 5k ? 5k ? 5k ? 100 ? 100 ? 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 100 ? 3 ts000 9 env35 +5v 5k ? + + + + sp320 10mbps data throughput +5v-only, single supply operation 3 drivers, 3 receivers ?v.35 4 drivers, 4 receivers ?rs-232 80-pin mqfp surface mount packaging pin compatible with sp319 description the sp320 is a complete v.35 interface transceiver offering 3 drivers and 3 receivers of v.35, and 4 drivers and 4 receivers of rs-232 (v.28). a sipex patented charge pump allows +5v only low power operation. rs-232 drivers and receivers are specified to operate at 120kbps, all v.35 drivers and receivers operate up to 5mbps. sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines
2 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation absolute maximum ratings these are stress ratings only and functional operation of the device at these ratings or any other above those indicated in the operation sections of the specifications below is not implied. exposure to absolute maximum rating conditions for extended periods of time may affect reliability. v cc .....................................................................................................+7v input voltages logic........................................................-0.3v to (v cc +0.5v) drivers..................................................-0.3v to (v cc +0.5v) receivers.................................................. 30v at 100ma output voltages logic........................................................-0.3v to (v cc +0.5v) drivers....................................................................... 14v receivers..............................................-0.3v to (v cc +0.5v) storage temperature.......................................................-65?c to +150?c power dissipation..........................................................................1500mw package derating jc .......................................................................16 ?/w ja .......................................................................46 ?/w specifications t min to t max and v cc = 5v 5% unless otherwise noted. parameter min. typ. max. units conditions v.35 driver ttl input levels v il 0.8 volts v ih 2.0 volts voltage outputs differential outputs 0.44 0.55 0.66 volts r l =100 ? from a to b source impedance 50 100 150 ohms short circuit impedance 135 150 165 ohms measured from a=b to gnd, v out =-2v to +2v voltage output offset -0.6 +0.6 volts v offset ={[|v a |+|v b |]/2} ac characteristics transition time 40 ns rise/fall time, 10% to 90% maximum transmission rate 5 mbps r l =100 ? , v diff out = 0.55v 20% propagation delay t phl 150 250 ns measured from 1.5v of v in to 50% of v out t plh 150 250 ns measured from 1.5v of v in to 50% of v out v.35 receiver ttl output levels v ol 0.4 volts i out =-3.2ma v oh 2.4 volts i out =1.0ma receiver inputs differential input threshold -0.3 +0.3 volts input impedance 90 100 110 ohms short circuit impedance 135 150 165 ohms measured from a=b to gnd v in =-2v to +2v ac characteristics maximum transmission rate 5 mbps v in = 0.55v 20% propagation delay t phl 150 250 ns measured from 50% of v in to 1.5v of r out t plh 150 250 ns measured from 50% of v in to 1.5v of r out
3 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation specifications (continued) t min to t max and v cc = 5v 5% unless otherwise noted. parameter min. typ. max. units conditions rs-232 driver ttl input levels v il 0.8 volts v ih 2.0 volts voltage outputs high level output +5.0 +15.0 volts r l = 3k ? to gnd low level output -15.0 -5.0 volts r l = 3k ? to gnd open circuit output -15 +15 volts r l = short circuit current -100 +100 ma r l = gnd power off impedance 300 ohms v cc = 0v; v out = 2v ac characteristics slew rate 30 v/ s r l = 3k ? , c l = 50pf; from +3v to -3v or -3v to +3v, t a = 25?c, v cc = +5v maximum transmission rate 120 kbps r l = 3k ? , c l = 2500pf transition time 1.56 s rise/fall time, between 3v r l = 3k ? , c l = 2500pf propagation delay t phl 28 sr l = 3k ? , c l = 2500pf; from 1.5v of t in to 50% of v out t plh 28 sr l = 3k ? , c l = 2500pf; from 1.5v of t in to 50% of v out rs-232 receiver ttl output levels v ol 0.4 volts v oh 2.4 volts receiver input input voltage range -15 +15 volts high threshold 1.7 3.0 volts low threshold 0.8 1.2 volts hysteresis 0.2 0.5 1 volts v cc = 5v; t a = +25?c receiver input circuit bias +2.0 volts input impedance 3 5 7 kohms v in = 15v ac characteristics maximum transmission rate 120 kbps propagation delay t phl 0.1 1 s from 50% of r in to 1.5v of r out t plh 0.1 1 s from 50% of r in to 1.5v of r out power requirements no load v cc supply current 35 70 ma no load; v cc = 5.0v; t a = 25?c full load v cc supply current 60 ma rs-232 drivers r l = 3k ? to gnd; dc input v.35 drivers r l = 100 ? from a to b; dc input shutdown current 1.5 ma ts000 = env35 = 0v
4 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation all of the v.35 receivers can operate at data rates as high as 5mbps. the sensitivity of the v.35 receiver inputs is 300mv. rs-232 (v.28) drivers the rs-232 drivers are inverting transmitters, which accept either ttl or cmos inputs and output the rs-232 signals with an inverted sense relative to the input logic levels. typically, the rs-232 output voltage swing is 9v with no load, and 5v minimum with full load. the transmitter outputs are protected against infinite short-circuits to ground without degradation in reliability. in the power off state, the output impedance of the rs-232 drivers will be greater than 300 ? over a 2v range. should the input of a driver be left open, an internal 400k ? pullup resistor to v cc forces the input high, thus committing the output to a low state. the slew rate of the transmitter output is internally limited to a maximum of 30v/ s in order to meet the eia standards. the rs-232 drivers are rated for 120kbps data rates . rs-232 (v.28) receivers the rs-232 receivers convert rs-232 input signals to inverted ttl signals. each of the four receivers features 500mv of hysteresis margin to minimize the effects of noisy transmission lines. the inputs also have a 5k ? resistor to ground; in an open circuit situation the input of the receiver will be forced low, committing the output to a logic high state. the input resistance will maintain 3k ? -7k ? over a 15v range. the maximum operating voltage range for the receiver is 30v, under these conditions the input current to the receiver must be limited to less than 100ma. the rs-232 receivers can operate to beyond 120kbps. charge pump the charge pump is a sipex patented design (u.s. 5,306,954) and uses a unique approach compared to older less-efficient designs. the charge pump still requires four external capacitors, but uses a four-phase voltage shifting technique to attain symmetrical 10v power supplies. the capacitors can be as low as 0.1 f with a 16 volt rating. polarized or non-polarized capacitors can be used. theory of operation the sp320 is a single chip +5v-only serial transceiver that supports all the signals neces- sary to implement a full v.35 interface. three v.35 drivers and three v.35 receivers make up the clock and data signals. four rs-232 (v.28) drivers and four rs-232 (v.28) receivers are used for control line signals for the interface. v.35 drivers the v.35 drivers are +5v-only, low power voltage output transmitters. the drivers do not require any external resistor networks, and will meet the following requirements: 1. source impedance in the range of 50 ? to 150 ? . 2. resistance between short-circuited terminals and ground is 150 ? 15 ? . 3. when terminated with a 100 ? resistive load the terminal to terminal voltage will be 0.55 volts 20% so that the a terminal is positive to the b terminal when binary 0 is transmitted, and the conditions are reversed to transmit binary 1. 4. the arithmetic mean of the voltage of the a terminal with respect to ground, and the b terminal with respect to ground will not exceed 0.6 volts when terminated as in 3 above. the v.35 drivers can operate at data rates as high as 5mbps. the driver outputs are protected against short-circuits between the a and b outputs and short circuits to ground. two of the v.35 drivers, drin2 and drin3 are equipped with enable control lines. when the enable pins are high the driver outputs are disabled, the output impedance of a disabled driver will nominally be 300 ? . when the enable pins are low, the drivers are active. v.35 receivers the v.35 receivers are +5v only, low power differential receivers which meet the following requirements: 1. input impedance in the range of 100 ? 10 ? . 2. resistance to ground of 150 ? 15 ? , measured from short-circuited terminals.
5 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation phase 4 -vdd transfer- the fourth phase of the clock connects the negative terminal of c2 to ground and transfers the generated +10v across c2 to c4, the vdd storage capacitor. again, simulta- neously with this, the positive side of capacitor c1 is switched to +5v and the negative side is connected to ground, and the cycle begins again. since both v+ and v- are separately generated from vcc in a no load condition, v+and v- will be symmetrical. older charge pump approaches that generate v- from v+ will show a decrease in the magnitude of v- compared to v+ due to the inherent inefficiencies in the design. the clock rate for the charge pump typically operates at 15khz. the external capacitors must be 0.1 f with a 16v breakdown rating. shutdown mode the sp320 can be put into a low power shutdown mode by bringing both ts000 (pin 3) and env35 (pin 9) low. in shutdown mode, the sp320 will draw less than 2ma of supply current. for normal operation, both pins should be connected to +5v. external power supplies for applications that do not require +5v only, external supplies can be applied at the v+ and v- pins. the value of the external supply voltages must be no greater than 10v. the current drain from the 10v supplies is used for the rs-232 drivers. for the rs-232 driver the current requirement will be 3.5ma per driver. it is critical the external power supplies provide a power supply sequence of : +10v, +5v, and then -10v. applications information the sp320 is a single chip device that can implement a complete v.35 interface. three (3) v.35 drivers and three (3) v.35 receivers are used for clock and data signals and four (4) rs-232 (v.28) drivers and four (4) rs-232 (v.28) receivers can be used for the control signals of the interface. the following examples show the sp320 configured in either a dte or dce application. +10v a) c 2 + gnd gnd b) c 2 ?0v figure 1. charge pump waveforms figure 1a shows the waveform found on the positive side of capacitor c2, and figure 1b shows the negative side of capacitor c2. there is a free-running oscillator that controls the four phases of the voltage shifting. a description of each phase follows. phase 1 -vss charge storage- during this phase of the clock cycle, the positive side of capactors c1 and c2 are initially charged to +5v. c1+ is then switched to ground and the charge in c1- is transferred to c2-. since c2+ is connected to +5v, the voltage potential across capacitor c2 is now 10v. phase 2 -vss transfer- phase two of the clock connects the negative terminal of c2 to the vss storage capacitor and the positive terminal of c2 to ground, and transfers the generated -10v to c3. simultaneously, the positive side of capacitor c1 is switched to +5v and the negative side is connected to ground. phase 3 -vdd charge storage- the third phase of the clock is identical to the first phase- the trans- ferred charge in c1 produces -5v in the negative terminal of c1, which is applied to the negative side of capacitor c2. since c2+ is at +5v, the voltage potential across c2 is +10v.
6 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation figure 2. charge pump phase 1 figure 3. charge pump phase 2 v cc = +5v +10v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ v cc = +5v ?v ?v +5v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ figure 4. charge pump phase 3 figure 5. charge pump phase 4 v cc = +5v ?0v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ v cc = +5v ?v +5v ?v v ss storage capacitor v dd storage capacitor c 1 c 2 c 3 c 4 + + ++ figure 6. a competitor? typical v.35 solution using six components. 1 f 1 f 1 f1 f dx t p s txd (103) rx t p s dx t u w scte (113) rx t u w t aa y txc (114) dx t y t x v rxc (115) t x v rx t t r txd (104) t t r rx rx dx dx aa t = 50 ? 50 ? 125 ? 1 f 1 f v cc2 b a gnd (102) cable shield b a v cc1 1 f 1 f dx dx rx rx rx rx dx dx 1 f1 f 1 f 1 f rx rx dx dx dx dx rx rx 1 f1 f iso 2593 34-pin dte/dce interface connector iso 2593 34-pin dte/dce interface connector v .35 v.35 rs-232 rs-232 h dtr (108) h c r ts (105) c e dsr (107) e d cts (106) d f dcd (109) f nn tm (142) n rdl (140) n l llb (141) l nn optional signals v cc1 5v v cc2 5v
7 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation 0.1 f 25 27 26 30 32 1n5819 v cc v dd c1- c2- v ss c1+ c2+ 0.1 f sp320cf 14 79 28 31 0.1 f +5v 15 20 1 22 0.1 f 0.1 f 25 27 26 30 32 1n5819 v cc v dd c1- c2- v ss c1+ c2+ 0.1 f sp320cf 28 31 0.1 f +5v 0.1 f rc out 1 14 20 79 22 15 14 txd (103) txc (113) txcc (114) rxc (115) rxd (104) dtr (108) r ts (105) rl (140) ll (141) dsr (107) cts (106) dcd (109) tm (142) 78 r1 out 80 r4 out 21 rc out 2 rc out 3 dr in 2 dr in 3 dr in 1 r2 out r3 out 19 t2 in 16 t1 in 13 t3 in 17 t4 in 24 dr in 1 dr in 3 dr in 2 rc out 3 rc out 2 rc out 1 t2 in 16 t1 in 13 t3 in 17 t4 in 24 r2 out 78 r1 out 80 r3 out 19 r4 out 21 p s u w y aa x v t r h c n l e d f nn p s u w y aa x v t r h c l e d f n nn 29, 34, 43, 60, 64, 72 29, 34, 43, 60, 64, 72 b b aa iso2593 34-pin dte/dce interface connector iso2593 34-pin dte/dce interface connector figure 7. typical dte-dce v.35 connection with the sp320
8 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation 14 drin1 61 dra1 59 drb1 13 t1in 58 t1out 16 t2in 54 t2out 17 t3in 47 t3out 24 t4in 51 t4out 22 drin2 42 dra2 44 drb2 15 drin3 63 dra3 65 drb3 23 sten 6 tten rca1 70 rcout 1 rcb1 71 rca2 37 rcout2 20 rcb2 38 r1in 66 r1out 80 r2in 68 r2out 78 r3in 35 r3out 19 r4in 39 r4out 21 rca3 76 rcout3 79 r ten 7 rcb3 77 rxd 104(a) 104(b) cts 106 dsr 107 dcd 109 ri 125 rxc 115(a) 115(b) txcc 114(a) 114(b) 103(a) 103(b) txd 113(a) txc 113(b) rts 105 dtr 108 rlpbk 140 llpbk 141 spare spare spare 29, 34, 43, 60, 64, 72 vdd 32 26 30 28 31 c1+ c1- c2+ c2- 27 vss vcc 0.1 f 0.1 f 0.1 f 0.1 f +5v 25, 33, 41, 62, 73 5k ? 5k ? 5k ? 100 ? 100 ? 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 100 ? 3 ts000 9 env35 +5v 5k ? + + + + a chasis ground c request to send e dce ready (dsr) h dte ready (dtr) k unassigned--- m unassigned--- p transmitted data (a) s transmitted data (b) u terminal timing (a) } 113(a) w terminal timing (b) } 113(b) y transmit timing (a) } 114(a) aa transmit timing (b) } 114(b) cc unassigned--- ee unassigned--- hh unassigned--- kk unassigned--- mm unassigned--- signal ground b clear to send d data carrier detect f ring indicator j local loopback l remote loopback n receive data (a) r receive data (b) t receive timing (a) v receive timing (b) x unassigned--- z unassigned--- bb unassigned--- dd unassigned--- ff unassigned--- jj unassigned--- ll test mode nn iso-2593 connector pin out typical dce v.35 interface sp320
9 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation 14 drin1 61 dra1 59 drb1 13 t1in 58 t1out 16 t2in 54 t2out 17 t3in 47 t3out 24 t4in 51 t4out 22 drin2 42 dra2 44 drb2 15 drin3 63 dra3 65 drb3 23 sten 6 tten rca1 70 rcout 1 rcb1 71 rca2 37 rcout2 20 rcb2 38 r1in 66 r1out 80 r2in 68 r2out 78 r3in 35 r3out 19 r4in 39 r4out 21 rca3 76 rcout3 79 r ten 7 rcb3 77 29, 34, 43, 60, 64, 72 vdd 32 26 30 28 31 c1+ c1- c2+ c2- 27 vss vcc 0.1 f 0.1 f 0.1 f 0.1 f +5v 25, 33, 41, 62, 73 5k ? 5k ? 5k ? 100 ? 100 ? 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 100 ? 3 ts000 9 env35 +5v txd 103(a) 103(b) rts 105 dtr 108 rlpbk 140 llpbk 141 spare spare spare txct 113(a) 113(b) 104(a) 104(b) rxd 114(a) txcc 114(b) 106 cts 107 dsr 109 dcd 125 ri 115(a) rxc 115(b) 5k ? + + + + a chasis ground c request to send e dce ready (dsr) h dte ready (dtr) k unassigned--- m unassigned--- p transmitted data (a) s transmitted data (b) u terminal timing (a) } 113(a) w terminal timing (b) } 113(b) y transmit timing (a) } 114(a) aa transmit timing (b) } 114(b) cc unassigned--- ee unassigned--- hh unassigned--- kk unassigned--- mm unassigned--- signal ground b clear to send d data carrier detect f ring indicator j local loopback l remote loopback n receive data (a) r receive data (b) t receive timing (a) v receive timing (b) x unassigned--- z unassigned--- bb unassigned--- dd unassigned--- ff unassigned--- jj unassigned--- ll test mode nn iso-2593 connector pin out typical dte v.35 interface sp320
10 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation 14 drin1 61 dra1 59 drb1 13 t1in 58 t1out 16 t2in 54 t2out 17 t3in 47 t3out 24 t4in 51 t4out 22 drin2 42 dra2 44 drb2 15 drin3 63 dra3 65 drb3 23 sten 6 tten rca1 70 rcout 1 rcb1 71 rca2 37 rcout2 20 rcb2 38 r1in 66 r1out 80 r2in 68 r2out 78 r3in 35 r3out 19 r4in 39 r4out 21 rca3 76 rcout3 79 r ten 7 rcb3 77 29, 34, 43, 60, 64, 72 vdd 32 26 30 28 31 c1+ c1- c2+ c2- 27 vss vcc 0.1 f 0.1 f 0.1 f 0.1 f +5v 25, 33, 41, 62, 73 5k ? 5k ? 5k ? 100 ? 100 ? 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 400k ? vcc 100 ? 3 ts000 9 env35 +5v 5k ? + + + + 60 gnd 59 drb1 58 t1out 57 nc 56 nc 55 nc 54 t2out 53 nc 52 nc 51 t4out 50 nc 49 nc 48 nc 47 t3out 46 nc 45 nc 44 drb2 43 gnd 42 dra2 41 vcc 80 r1out 79 rcout3 78 r2out 77 rcb3 76 rca3 75 nc 74 nc 73 vcc 72 gnd 71 rcb1 70 rca1 69 nc 68 r2in 67 nc 66 r1in 65 drb3 64 gnd 63 dra3 62 vcc 61 dra1 rout4 21 drin2 22 t4in 24 vcc 25 c1+ 26 vdd 27 c2+ 28 gnd 29 c1- 30 c2- 31 vss 32 vcc 33 gnd 34 r3in 35 nc 36 rca2 37 rcb2 38 r4in 39 nc 40 sten 23 rcout1 1 nc 2 ts000 3 nc 4 nc 5 tten 6 rten 7 nc 8 env35 9 nc 10 nc 11 nc 12 t1in 13 drin1 14 drin3 15 t2in 16 t3in 17 nc 18 r3out 19 rcout2 20 pin configuration sp320 typical application circuit sp320
11 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation package: 80 pin mqfp 80 pin mqfp (ms-022 bc) b e seating plane a1 a a l1 5 -16 0 min. 0 ? 5 -16 l a2 0.30" rad. typ. 0.20" rad. typ. c pin 1 e1 d1 d c l e c l d2 e2 dimensions minimum/maximum (mm) symbol a a1 a2 b d d1 d2 e e1 e2 e n 80?in mqfp jedec ms-22 (bec) variation min nom max 2.45 0.00 0.25 1.80 2.00 2.20 0.22 0.40 17.20 bsc 14.00 bsc 12.35 ref 17.20 bsc 14.00 bsc 12.35 ref 0.65 bsc 80 common dimentions symbl min nom max c 0.11 23.00 l 0.73 0.88 1.03 l1 1.60 basic
12 rev:a date: 1/27/04 sp320 complete +5v-only v.35 interface with rs-232 (v.28) control lines ?copyri ght 2004 sipex corporation ordering information model temperature range package types sp320acf ................................................... 0?c to +70?c ...................... 80-pin jedec (be-2 outline) mqfp please consult the factory for pricing and availability on a tape-on-reel option. sipex corporation reserves the right to make changes to any products described herein. sipex does not assume any liability aris ing out of the application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor t he rights of others. date revision description 1/27/04 a implemented tracking revision. revision history

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